As the feature size of electronic devices shrinks, reliability of interconnects becomes critical to integrated circuit performance. Generally, electromigration refers to the transport of material caused by the movement of the ions in a conductor due to the momentum transfer between conducting electrons and diffusing metal atoms. The effect is especially important in applications where high current densities are used, for example, in microelectronics structures involving logic devices. Typically, a metal capping technology is used to prevent electromigration.
FIG. 1A is a cross-sectional view of a typical interconnect structure having metal electromigration caps. As shown in FIG. 1A, metal interconnect lines, for example lines 103 and 104, formed on a dielectric substrate 101 are originally spaced apart at a line spacing 105. The electromigration caps, for example, caps 111-113, can be grown on the respective interconnect lines above a flat surface of the substrate using electroless plating. Generally, the growth of the electromigration caps on the interconnect lines is isotropic. The electromigration cap can grow on the interconnect metal line vertically as well as laterally above the substrate. The lateral growth of the metal electromigration caps may generate overhang structures, for example, an overhang 109 that protrude over the substrate 101 outside the width of the interconnect lines. As shown in FIG. 1A, the lateral growth of the metal caps reduces a line-to-line spacing from spacing 105 to spacing 107.
Typically, the size of the overhang 109, is about 50% of the cap thickness. For example, if the two neighboring metal caps have the thickness of about 10 nanometers (“nm”), the total size of their overhangs can be about 2×5 nm. As such, the line-to-line spacing can be reduced, for example, by a factor of two from about 20 (nm) to about 10 nm.
FIG. 1B is a top view of a typical interconnect structure having metal electromigration caps electrolessly grown over a flat surface of substrate 121 having interconnect lines, such as an interconnect line 123. As shown in FIG. 1B, the lateral growth of the metal caps above the substrate increases the line edge roughness (“LER”) and reduces line-to-line spacing. As shown in FIG. 1B, the line-to-line spacing, for example, a line-to-line spacing 125, varies uncontrollably. Both the increased LER and reduced line-to-line spacing negatively impact on the reliability of the interconnect structures, increase the risk of current shorting that may lead to the failure of the entire integrated circuit device.